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Power management scheme that accumulates additional off time for device when off for an extended period and credits additional off time to power control feedback loop when awakened
Power management scheme that accumulates additional off time for device when off for an extended period and credits additional off time to power control feedback loop when awakened
In one embodiment, a system includes a power management controller that controls a duty cycle of a processor to manage power. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. Before powering the processor up, the power management control may determine whether or not there is work for the processor to perform. If there is no work to perform, the power management control may delay powering the processor up until there is work to perform, saving additional power. This additional power savings may be tracked, and may serve as a “credit” for the processor when subsequently powered up again.
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