Using FPGA partial reconfiguration for codec applications

摘要

Various embodiments of the present disclosure enable interoperability between multiple codecs of various standards, notwithstanding that the number and type of standards in use at any particular time may vary unpredictably. A control unit, for example, a multipoint control unit (MCU) of a videoconference system, includes a partially reconfigurable programmable logic device (PLD). The PLD may include a reconfigurable region and a non-reconfigurable portion. The non-reconfigurable portion may include logic blocks for performing codec operations that are common across at least two codec standards. A selected subset a number of personas may be instantiated within the reconfigurable region of the PLD, each persona of the selected subset being compatible with at least a portion of the associated codec of at least one communication channel. The MCU selects, from between two or more personas, the selected subset of personas to be used within the reconfigurable region of the PLD.