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Multi-chip package having a logic chip disposed in a package substrate opening and connecting to an interposer

机译:具有逻辑芯片的多芯片封装,该逻辑芯片设置在封装基板的开口中并连接至中介层

摘要

A multi-chip package may include a package substrate, a connecting substrate, a plurality of semiconductor chips and a logic chip. The package substrate may have an opening. The connecting substrate may be arranged on an upper surface of the package substrate. The semiconductor chips may be stacked on an upper surface of the connecting substrate. The semiconductor chips may be electrically connected with the connecting substrate. The logic chip may be arranged in the opening. The logic chip may be electrically connected between the connecting substrate and the package substrate. Thus, the logic chip may not act as to increase a width of the multi-chip package.
机译:多芯片封装可以包括封装基板,连接基板,多个半导体芯片和逻辑芯片。封装基板可以具有开口。连接基板可以布置在封装基板的上表面上。半导体芯片可以堆叠在连接基板的上表面上。半导体芯片可以与连接基板电连接。逻辑芯片可以布置在开口中。逻辑芯片可以电连接在连接基板和封装基板之间。因此,逻辑芯片可能不会起到增加多芯片封装的宽度的作用。

著录项

  • 公开/公告号US9299685B2

    专利类型

  • 公开/公告日2016-03-29

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号US201414451520

  • 发明设计人 KIL-SOO KIM;

    申请日2014-08-05

  • 分类号H01L25/065;H01L23/13;H01L23/498;H01L23/31;H01L25/18;H01L23;H01L23/48;

  • 国家 US

  • 入库时间 2022-08-21 14:28:59

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