2 Device for real-time streaming of two or more streams in parallel to a solid state memory device array

摘要

12. An element for real-time streaming into an array of solid state memory element devices, comprising: receiving means for receiving data in parallel from a data stream at an individual data rate; an input cache for buffering received data; (T_r), a page-write-time (wrt_tm), an amount of data (p), and an amount of data (p) to dynamically control the bus system. Wherein the data received from the first data stream is transmitted only to a set of solid state memory elements included in a first subset of the array of solid state memory elements, The data received from the stream is transferred to the solid- Included in the second sub-set of another of the array of solid state bit is sent only to the memory device set.