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Likelihood generation circuit and likelihood generation method

机译:可能性生成电路和可能性生成方法

摘要

1 bit is assigned depending on whether it is an inner circle or an outer circle on the constellation mapping diagram, 2 bits are assigned to each quadrant, and the phase of the symbol of the inner circle or outer circle of the 8QAM received symbol set that has been bit mapped is phase-shifted. By generating the degree, a 2-bit likelihood assigned to the quadrant of the phase-rotated 8QAM symbol set is generated together with the likelihood of the received symbol of QPSK, and the phase-rotated 8QAM symbol set is further constellated. Rotate the phase to the first quadrant on the mapping diagram, move to the QPSK symbol mapping position, and generate 1-bit likelihood assigned to the inner circle or outer circle of the 8QAM symbol set by QPSK likelihood generation .
机译:根据星座图上的内圆还是外圆,分配1位,每个象限分配2位,并且8QAM接收符号集的内圆或外圆的符号相位已被位图移相。通过生成度,生成分配给相位旋转的8QAM符号集的象限的2比特似然度以及所接收的QPSK符号的似然度,并且进一步构图相位旋转的8QAM符号集。将相位旋转到映射图上的第一象限,移至QPSK符号映射位置,并通过QPSK似然度生成将1位似然度分配给8QAM符号集的内圆或外圆。

著录项

  • 公开/公告号JPWO2015056342A1

    专利类型

  • 公开/公告日2017-03-09

    原文格式PDF

  • 申请/专利权人 三菱電機株式会社;

    申请/专利号JP20150542467

  • 发明设计人 藤森 崇文;杉原 隆嗣;

    申请日2013-10-18

  • 分类号H04L27;H03M13/45;

  • 国家 JP

  • 入库时间 2022-08-21 13:53:13

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