High Electron Mobility Transistor with Carrier Injection Mitigation Gate Structure

摘要

A method includes providing a heterostructure body with a buffer region, and a barrier region disposed on the buffer region, and forming a gate structure for controlling the channel on the heterostructure body, the gate structure having a doped semiconductor region disposed on the heterostructure body, an interlayer disposed on the doped semiconductor region, and a gate electrode disposed on the interlayer. Forming the gate structure includes controlling a doping concentration of the doped semiconductor region such that a portion of the channel adjacent the gate structure is non-conductive at zero gate bias, and controlling electrical and geometrical characteristics of the interlayer based upon a relationship between the electrical and geometrical characteristics of the interlayer and corresponding effects on a static threshold voltage and a dynamic threshold voltage shift of the semiconductor device.