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COMPOSITE VIEWS FOR IP BLOCKS IN ASIC DESIGNS
COMPOSITE VIEWS FOR IP BLOCKS IN ASIC DESIGNS
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机译:ASIC设计中IP块的综合视图
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摘要
A computing device for a generating composite view for an intellectual property (IP) core may obtain constraints for multiple application specific integrated circuits (ASIC) designs in which the IP core is used; and determine composite constraints for the IP core based on the constraints for the multiple ASIC designs. The composite constraints may be within all constraints for the multiple ASIC designs. A freedom of change to update the particular IP core may be identified based on the composite constraints.
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