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APPARATUS FOR CORRECTING LINEARITY OF A DIGITAL-TO-ANALOG CONVERTER

机译:用于校正数模转换器的线性度的装置

摘要

Described is an apparatus which comprises: a digital-to-analog converter (DAC) having a DAC cell with p-type and n-type current sources and an adjustable strength current source which is operable to correct non-linearity of the DAC cell caused by both the p-type and n-type current sources; and measurement logic, coupled to the DAC, having a reference DAC cell with p-type and n-type current sources, wherein the measurement logic is to monitor an integrated error contributed by both the p-type and n-type current sources of the DAC cell, and wherein the measurement logic is to adjust the strength of the adjustable strength current source according to the integrated error and currents of the p-type and n-type current sources of the reference DAC cell.
机译:描述了一种装置,其包括:数模转换器(DAC),其具有具有p型和n型电流源的DAC单元以及可调节强度的电流源,其可用于校正所引起的DAC单元的非线性通过p型和n型电流源;以及与DAC耦合的测量逻辑,该测量逻辑具有一个基准DAC单元,该基准DAC单元具有p型和n型电流源。 DAC单元,其中测量逻辑用于根据参考DAC单元的p型和n型电流源的积分误差和电流来调节强度可调电流源的强度。

著录项

  • 公开/公告号US2017063388A1

    专利类型

  • 公开/公告日2017-03-02

    原文格式PDF

  • 申请/专利权人 INTEL IP CORPORATION;

    申请/专利号US201615334218

  • 发明设计人 JOHN G. KAUFFMAN;UDO SCHUETZ;

    申请日2016-10-25

  • 分类号H03M1/06;H03M3;H03M1/10;

  • 国家 US

  • 入库时间 2022-08-21 13:47:50

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