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Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters

机译:使用具有选定或受控晶格参数的半导体材料层制造半导体结构或器件的方法

摘要

Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and subsequently changing the temperature of the layer of semiconductor material. The another material may be selected to exhibit a coefficient of thermal expansion such that, as the temperature of the layer of semiconductor material is changed, a controlled and/or selected lattice parameter is imparted to or retained in the layer of semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a layer of semiconductor material having an average lattice parameter at room temperature proximate an average lattice parameter of the layer of semiconductor material previously attained at an elevated temperature.
机译:制造半导体器件或结构的方法包括在一定温度下将一层半导体材料粘合到另一种材料上,然后改变半导体材料层的温度。可以选择另一种材料以表现出热膨胀系数,使得随着半导体材料层的温度改变,将受控的和/或选定的晶格参数赋予或保留在半导体材料层中。在一些实施例中,半导体材料层可以包括III-V型半导体材料,例如氮化铟镓。在这种方法中形成了新颖的中间结构。工程衬底包括在室温下具有平均晶格参数的半导体材料层,该半导体材料层接近先前在高温下获得的半导体材料层的平均晶格参数。

著录项

  • 公开/公告号US9793360B2

    专利类型

  • 公开/公告日2017-10-17

    原文格式PDF

  • 申请/专利权人 SOITEC;

    申请/专利号US201414314804

  • 发明设计人 CHANTAL ARENA;

    申请日2014-06-25

  • 分类号H01L29/20;H01L21/18;H01L21/762;H01L33;

  • 国家 US

  • 入库时间 2022-08-21 13:47:07

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