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Performance monitoring in a data processing apparatus capable of executing instructions at a plurality of privilege levels

机译:能够以多个特权级别执行指令的数据处理设备中的性能监视

摘要

A data processing apparatus has processing circuitry which can execute instructions at one of several privilege levels. A plurality of performance monitoring circuits are included. In response to an instruction executed at a first privilege level, first configuration data can be set for controlling performance monitoring by a first subset of performance monitoring circuits. A disable control flag can be set in response to an instruction executed at a second privilege level higher than the first privilege level. If the disable control flag has a predetermined value then performance monitoring control circuitry disables performance monitoring by the first subset of performance monitoring circuits while the processing circuitry is executing instructions at the second privilege level.
机译:数据处理设备具有可以以几种特权级别之一执行指令的处理电路。包括多个性能监视电路。响应于在第一特权级别执行的指令,可以设置第一配置数据以通过性能监视电路的第一子集来控制性能监视。可以响应于以高于第一特权级别的第二特权级别执行的指令来设置禁用控制标志。如果禁用控制标志具有预定值,则性能监视控制电路在处理电路以第二特权级别执行指令时禁用性能监视电路的第一子集的性能监视。

著录项

  • 公开/公告号US9798646B2

    专利类型

  • 公开/公告日2017-10-24

    原文格式PDF

  • 申请/专利权人 ARM LIMITED;

    申请/专利号US201514747141

  • 发明设计人 MICHAEL JOHN WILLIAMS;SIMON JOHN CRASKE;

    申请日2015-06-23

  • 分类号G06F11/34;G06F11/14;G06F11/30;

  • 国家 US

  • 入库时间 2022-08-21 13:46:07

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