A method for accelerating the updating of the linking elements in a simulation of a system generated according to a given hardware description language, the method comprising a phase for evaluating the eligible processes of the system, the evaluation phase comprising write or read accesses to linking elements. For each linking element, two write memory locations are provided. The evaluation phase comprises the updating of a linking element for each write or read access of the linking element. The update comprises the following steps: receive a selection word associated with the linking element; select one of the two write locations associated with the linking element depending on the value of the selection word received for the linking element; and update the current value of the linking element based on the write memory location selected.
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