A method and apparatus for securing a program counter structure of a processor system and for monitoring the handling of an interrupt request

摘要

The invention relates to a method for securing a program counter structure (102) of a processor system (104) in the event of an interrupt request (106). The processor system (104) comprises at least the program counter structure (102), an interrupt controller (108), and a memory (110). The interrupt controller (108) is configured to provide an address (112) associated with the interrupt request (106) to the program counter structure (102) in response to the interrupt request (106). The program counter structure (102) is configured to output an address (352) to the memory (110) via a memory interface (114). The method (400) includes a step of reading, a step of comparing, and a step of providing. In the read-in step, the address (352) is read from the memory interface (114). In step (404) of the comparison, this address (352) is compared with a target address (120) associated with the interrupt request (106) to obtain a comparison result (126). In the providing step, a match signal (124) is provided using the comparison result (126). The latter can also be used to monitor the handling of interrupt requests. For example, to monitor compliance with the priority of these interrupt requests, or also as part of monitoring the correct execution of the interrupt request interrupt routine (interrupt service routine).