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Ternary content addressable memories having a bit cell with memristors and serially connected match-line transistors
Ternary content addressable memories having a bit cell with memristors and serially connected match-line transistors
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机译:具有带有忆阻器和串行连接的匹配线晶体管的位单元的三元内容可寻址存储器
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摘要
An example ternary content addressable memory. A bit cell of the memory may include a first memristor that has a first terminal that is connected to a first data line and a second terminal that is selectively connected to a second data line via a first switching transistor. The bit cell may also include a second memristor that has a first terminal that is connected to a third data line and a second terminal that is selectively connected to a fourth data line via a second switching transistor. The bit cell may also include a first match-line transistor and a second match-line transistor that are connected in series between a first rail and a match line, with a gate of the first match-line transistor being connected to the second terminal of the first memristor, and a gate of the second match-line transistor being connected to the second terminal of the second memristor.
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