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Vertical high voltage half conductor apparatus and method of manufacturing a vertical high voltage half conductor device

机译:垂直高压半导体装置和制造垂直高压半导体装置的方法

摘要

Vertical high voltage half conductor a device comprising:a semiconductor substrate (1) of a first conductivity type;a first semiconductor layer (2) of the first conductivity type, which are placed on the semiconductor substrate (1) is formed and an impurity concentration lower than that of the semiconductor substrate (1) comprises;a second semiconductor layer (3) of a second conductivity type, which selectively to a surface of the first semiconductor layer (2) is formed and an impurity concentration higher than that of the first semiconductor layer (2) comprises;a base layer (4) of the second conductivity type, which on the first semiconductor layer (2) and the second semiconductor layer (3) is arranged;a first - conductivity type - source - region (7) which selectively in a surface layer of the base layer (4) is formed;an n - against layer (6) of the first conductivity type, which is adapted the base layer (4) from a surface and to pass through the first semiconductor layer (2) to achieve;a gate - electrode layer (10), which is formed by means of a gate - insulating layer (9) in at least a portion of an exposed portion of a surface of the base layer (4) between the source - region (7) and the n - against layer (6) is arranged;a source - electrode (11) in common contact with surfaces of the source - region (7) and the base layer (4); anda drain - electrode (12), which on a rear side of the semiconductor substrate (1) is arranged.Sections of the second semiconductor layer (3) in areas with one another under the n - against layers (6) are connected.
机译:垂直高压半导体一种器件,该器件包括:第一导电类型的半导体衬底(1);放置在半导体衬底(1)上的第一导电类型的第一半导体层(2),并且形成杂质浓度低于半导体衬底(1)的杂质包括;第二导电类型的第二半导体层(3),其选择性地形成在第一半导体层(2)的表面上,并且杂质浓度高于第一半导体层(2)的杂质浓度半导体层(2)包括:第二导电类型的基层(4),其布置在第一半导体层(2)和第二半导体层(3)上;第一-导电类型-源极-区域(7)选择性地在基层(4)的表面层中形成);第一导电类型的n-相对层(6),其从表面适应基层(4)并穿过第一半导体层(2)到达即,栅-电极层(10),其通过栅-绝缘层(9)在源极-区域之间的基础层(4)的表面的暴露部分的至少一部分中形成。如图7所示,设置n-接触层(6);与源-区域(7)和基层(4)的表面共同接触的源-电极(11);第二半导体层(3)的在n-下方的层(6)彼此连接的部分被连接。-漏极(12)布置在半导体衬底(1)的后侧。

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