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Acceleration of memory walking sequences during simulation

机译:在仿真过程中加速内存步移序列

摘要

Embodiments of the present invention provide a system, method, and program product for accelerating a simulated memory walking sequence during a simulation conducted by a computer. In one embodiment, a simulation test-case is executed and one or more memory locations in the simulated memory are identified as eligible to contain valid data. Subsequent to commencement of the simulated memory walking sequence, it is determined whether an identified memory location is within a specified number of memory locations after a memory location to be processed by simulated hardware during the simulated memory walking sequence. If an identified memory location is within the specified number, the simulated hardware is allowed to process the memory location. If an identified memory location is not within the specified number, the simulated hardware is advanced to a subsequent memory location and is allowed to process the subsequent memory location.
机译:本发明的实施例提供了一种用于在计算机进行的模拟期间加速模拟的存储器游走序列的系统,方法和程序产品。在一个实施例中,执行模拟测试用例,并且将模拟存储器中的一个或多个存储器位置标识为合格包含有效数据。在模拟存储游动序列开始之后,确定在模拟存储游动序列期间要由模拟硬件处理的存储位置之后,所标识的存储位置是否在指定数量的存储位置内。如果已识别的内存位置在指定数量之内,则允许仿真硬件处理该内存位置。如果所标识的存储位置不在指定的数量之内,则将模拟硬件前进到后续的存储位置,并允许其处理后续的存储位置。

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