PROCESSOR WITH SECURE HASH ALGORITHM AND DIGITAL SIGNAL PROCESSING METHOD WITH SECURE HASH ALGORITHM

摘要

A processor using an internal memory to store constants Kt required in a secure hash algorithm (SHA). The latency due to loading the constants Kt from an external memory, therefore, is eliminated. The processor further introduces an instruction set architecture that provides one instruction for the processor to read the constants Kt from the internal memory and perform a particular process on the read constants Kt. Thus, the SHA works efficiently.