COMPARATOR HAVING DIFFERENTIAL FDSOI TRANSISTOR PAIR WITH GATE CONNECTED TO BACK-GATE TO REDUCE RTS NOISE

摘要

Embodiments of the present disclosure provide a circuit structure including: a first transistor having a gate, a drain connected to a first node, a FDSOI channel region positioned between a source and the drain, a back-gate, separated from the FDSOI channel with a buried insulator layer positioned beneath the FDSOI channel, wherein the back-gate of the first transistor and a first input signal voltage are connected to the gate of the first transistor, and the source is connected to a first shared node; and a second transistor having a gate, a source connected to the first shared node, a drain connected to a second node, a FDSOI channel positioned between the source and drain, and a buried insulator positioned beneath the FDSOI channel and a back-gate, wherein the back-gate of the second transistor and a second input signal voltage are connected to the gate of the second transistor.