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SAR ADCDelta-Sigma ADC using SAR quantizer

机译:SAR ADC使用SAR量化器的Delta-Sigma ADC

摘要

Disclosed is a delta sigma ADC using an SAR quantizer. The disclosed delta sigma ADC comprises: a loop filter unit; a successive approximation register (SAR) quantizer unit which receives an output signal of the loop filter unit and outputs a first output signal and a second output signal; a digital filter unit which performs a digital filtering for the second output signal; and a subtractor A which receives the first output signal through a positive (+) input terminal and an output signal of the digital filter unit through a negative (-) input terminal. The loop filter unit receives an analog signal and the first output signal. The output signal of the subtractor A is an output signal of the delta sigma ADC. The first output signal is most significant bits (MSBs) among result values quantized in the SAR quantizer unit, and the second output signal is least significant bits (LSBs) among result values quantized in the SAR quantizer unit. Due to the use of the SAR quantizer, the present invention minimizes problems occurring in a process of generating quantization noise and easily reduces the quantization noise in a final output.
机译:公开了一种使用SAR量化器的Δ-ΣADC。所公开的Δ-ΣADC包括:环路滤波器单元;以及逐次逼近寄存器(SAR)量化器单元,其接收环路滤波器单元的输出信号并输出​​第一输出信号和第二输出信号;数字滤波器单元,对第二输出信号进行数字滤波;减法器A通过正(+)输入端接收第一输出信号,并通过负(-)输入端接收数字滤波器单元的输出信号。环路滤波器单元接收模拟信号和第一输出信号。减法器A的输出信号是Δ∑ADC的输出信号。第一输出信号是在SAR量化器单元中量化的结果值中的最高有效位(MSB),第二输出信号是在SAR量化器单元中量化的结果值中的最低有效位(LSB)。由于使用了SAR量化器,本发明使产生量化噪声的过程中出现的问题最小化,并容易地减小了最终输出中的量化噪声。

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