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Method for a simplified integration of high-precision thin-film resistors

机译:高精度薄膜电阻器简化集成的方法

摘要

A method of fabricating an integrated circuit, the method comprising: (a) depositing and patterning an electrically resistive material layer of an alloy such as NiCr, NiCrAl or SiCr serving as a thin film resistor (TFR), (b) depositing a first electrically insulating layer (IMDn) on the electrically resistive layer of the TFR, (c) depositing an electrically conductive metal layer (METn) of an electrically conductive material, (d) leaving a region without the electrically conductive metal layer (METn), the region (CA) as an opening in the electrically conductive metal layer is formed, and wherein the region overlaps the electrically resistive layer of the TFR, (e) depositing a second electrically insulating layer (IMDn + 1) on the electrically conductive metal layer (METn), (f) etching a first via hole (TFVIA) through the second electrically insulating layer (IMDn + 1), the area of the opening (CA) without the electrically conductive metal layer and through the first electrically insulating layer (IMDn) down to the electrically resistive layer of the TFR and (g) depositing an electrically conductive material in the first via opening (TFVIA) to electrically connect the electrically conductive metal layer (METn) and the electrically resistive layer of the TFR.
机译:一种制造集成电路的方法,该方法包括:(a)沉积并图案化用作薄膜电阻器(TFR)的诸如NiCr,NiCrAl或SiCr的合金的电阻材料层,(b)沉积第一电TFR的电阻层上的绝缘层(IMDn),(c)沉积一种导电材料的导电金属层(METn),(d)留下一个没有导电金属层(METn)的区域(CA)作为在导电金属层中的开口形成,并且其中该区域与TFR的电阻层重叠,(e)在导电金属层(METn)上沉积第二电绝缘层(IMDn + 1) ),(f)蚀刻穿过第二电绝缘层(IMDn + 1),没有导电金属层的开口(CA)的区域以及穿过第一电绝缘层的第一通孔(TFVIA)层(IMDn)向下延伸至TFR的电阻层,并(g)在第一通孔(TFVIA)中沉积导电材料,以将TFR的导电金属层(METn)与电阻层电连接。

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