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Protection of keys and sensitive data from attack within microprocessor architecture

机译:保护密钥和敏感数据免受微处理器体系结构内的攻击

摘要

A processor core that includes a token generator circuit is to execute a first instruction in response to initialization of a software program that requests access to protected data output by a cryptographic operation. To execute the first instruction, the processor core is to: retrieve a key that is to be used by the cryptographic operation; trigger the token generator circuit to generate an authorization token; cryptographically encode the key and the authorization token within a key handle; store the key handle in memory; and embed the authorization token within a cryptographic instruction that is to perform the cryptographic operation. The cryptographic instruction may be associated with a first logical compartment of the software program that is authorized access to the protected data.
机译:包括令牌生成器电路的处理器核心将响应于软件程序的初始化来执行第一指令,该软件程序请求访问通过密码操作输出的受保护数据。为了执行第一条指令,处理器核心将执行以下操作:检索密码操作要使用的密钥;触发令牌生成器电路生成授权令牌;在密钥句柄中对密钥和授权令牌进行密码编码;将密钥句柄存储在内存中;并将授权令牌嵌入要执行加密操作的加密指令中。密码指令可以与软件程序的被授权访问受保护数据的第一逻辑部分相关联。

著录项

  • 公开/公告号US10785028B2

    专利类型

  • 公开/公告日2020-09-22

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号US201816024259

  • 申请日2018-06-29

  • 分类号G06F21;H04L9/32;H04L9/08;G06F21/60;

  • 国家 US

  • 入库时间 2022-08-21 11:30:08

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