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Incremental generation of an FPGA implementation with a graph-based similarity search

机译:使用基于图的相似度搜索递增生成FPGA实现

摘要

A method for generating an FPGA implementation based on an FPGA design serving as an FPGA model and/or a hardware description, including the steps of synthesizing a net list from the FPGA design and generating the FPGA implementation from the net list. The method includes searching for a similar FPGA implementation, the step of generating the FPGA implementation from the net list takes place using the similar FPGA implementation, the method includes a step of generating a graph-based representation based on the FPGA design, and the step of searching for a similar FPGA implementation comprises comparing the graph-based representation of the FPGA design with a graph-based representation of the at least one similar FPGA implementation. A method for generating a bit stream based on an FPGA design is also provided, serving as an FPGA model and/or a hardware description.
机译:一种用于基于用作FPGA模型和/或硬件描述的FPGA设计生成FPGA实现的方法,包括从FPGA设计合成网表并从网表生成FPGA实现的步骤。该方法包括搜索相似的FPGA实现,使用相似的FPGA实现从网表生成FPGA实现的步骤,该方法包括基于FPGA设计生成基于图的表示的步骤,以及该步骤。寻找相似的FPGA实现的步骤包括将FPGA设计的基于图的表示与至少一个相似的FPGA实现的基于图的表示进行比较。还提供了一种用于基于FPGA设计生成位流的方法,用作FPGA模型和/或硬件描述。

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