首页>
外国专利>
Dynamic microprocessor gate design tool for area/timing margin control
Dynamic microprocessor gate design tool for area/timing margin control
展开▼
机译:用于面积/时序裕度控制的动态微处理器门设计工具
展开▼
页面导航
摘要
著录项
相似文献
摘要
A computer-implemented method for optimizing microprocessor gates in a microprocessor includes receiving, via a processor, a dataset comprising a model of a plurality of gates of a microprocessor; determining, via the processor, whether a transmission line in the model, if implemented in a physical circuit, would result a signal transmission time less than a predetermined threshold time; applying to the model, via the processor, a proposed gate change to one or more of the plurality of gates; evaluating, via the processor and an area degradation based on the proposed gate change; determining, via the processor, a margin value based on the signal transmission time and an area degradation value; and making, via the processor, a gate change decision based on the margin value.
展开▼