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Predicting local layout effects in circuit design patterns

机译:预测电路设计模式中的局部布局效应

摘要

A method for predicting local layout effect in a circuit design pattern includes obtaining a plurality of circuit design patterns, generating layout images from the circuit design patterns, extracting feature vectors from the layout images by processing the layout images in a computer vision machine learning algorithm, comparing the feature vector extracted from a selected layout image to clusters of feature vectors extracted from the layout images, wherein the clusters of feature vectors include an in-range cluster and an outlier cluster, and labelling a circuit design pattern corresponding to the selected layout image, for which threshold voltage has not been experimentally measured, as being an in-range circuit design pattern or an outlier circuit design pattern, in response to the selected layout image respectively correlating with the in-range cluster or with the outlier cluster.
机译:一种用于预测电路设计图案中局部布局效果的方法,包括获得多个电路设计图案,从电路设计图案生成布局图像,通过在计算机视觉机器学习算法中处理布局图像来从布局图像中提取特征向量,比较从选择的布局图像中提取的特征向量和从布局图像中提取的特征向量的聚类,其中,特征向量的聚类包括范围内聚类和离群聚类,并标记与选择的布局图像相对应的电路设计图案响应于所选择的布局图像分别与范围内群集或异常值群集相关联,针对阈值电压未对其进行实验测量的阈值电压是范围内电路设计图案或异常值电路设计图案。

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