首页> 外国专利> INTEGRATED ASSEMBLIES HAVING TRANSISTOR BODY REGIONS COUPLED TO CARRIER-SINK-STRUCTURES; AND METHODS OF FORMING INTEGRATED ASSEMBLIES

INTEGRATED ASSEMBLIES HAVING TRANSISTOR BODY REGIONS COUPLED TO CARRIER-SINK-STRUCTURES; AND METHODS OF FORMING INTEGRATED ASSEMBLIES

机译:集成组件,其晶体管体区域与承运人-储蓄机构结构相连;形成集成组件的方法和方法

摘要

Some embodiments include an integrated assembly having a carrier-sink-structure, and having digit lines over the carrier-sink-structure. Transistor body regions are over the digit lines. Extensions extend from the carrier-sink-structure to the transistor body regions. The extensions are configured to drain excess carriers from the transistor body regions. Lower source/drain regions are between the transistor body regions and the digit lines, and are coupled with the digit lines. Upper source/drain regions are over the transistor body regions, and are coupled with storage elements. Gates are adjacent the transistor body regions. The transistor body regions, lower source/drain regions and upper source/drain regions are together comprised a plurality of transistors. The transistors and the storage elements are together comprised by a plurality of memory cells of a memory array. Some embodiments include methods of forming integrated assemblies.
机译:一些实施例包括一种集成组件,该集成组件具有载子-接收器结构并且在载子-接收器结构上具有数字线。晶体管的主体区域在数字线上。延伸部分从载流子-阱结构延伸到晶体管主体区域。延伸部被配置为从晶体管主体区域排出多余的载流子。下部源极/漏极区在晶体管主体区和数字线之间,并与数字线耦合。上部源极/漏极区域在晶体管主体区域上方,并且与存储元件耦合。栅极邻近晶体管主体区域。晶体管主体区域,下部源极/漏极区域和上部源极/漏极区域一起包括多个晶体管。晶体管和存储元件一起由存储阵列的多个存储单元组成。一些实施例包括形成集成组件的方法。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号