Input buffer circuit less affected by noise

摘要

This research is driven by the first power supply voltage (VCC), one side is connected to the grounded power supply (VSS),Other units and NAND websites connected with the input (21);Output the first person butter (22) and output the NAND web address (21);From the low to high output of the previous butter (22), the artd (address rising transition) circuit (23) and that generate pulses through the internal circuit only in the case of less than days;Driven by the second power supply voltage (VCC), one side is connected to the grounding power supply (VSS),The other end is connected to the input end and has a capacitor (25) and a norrgate (24) of parallel structure between the second power supply voltage (VCC) and the grounding power supply (VSS);The second butter dough (26) outputted by the Noor gate (24) and;The output of the last 2-person butter (26) is from high to low, and the aftd (address falling transition) circuit (27) that generates pulse through the internal circuit only when:;And an input butter circuit characterized by printing the output of the second butter (26) and the third butter (28) again.