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Integrated injection logic circuit device

摘要

This study involves integrated injection logic elements,Perche formed by diffusion of p-type impurities in the specified field of semiconductor substrate,The P + type impurity is injected into the designated area of fivier,The diffusion region of P + impurity formed by diffusion,Do not overlap the diffusion region of P + impurity above at least one side, and inject n-type impurity into the above-mentioned pluml,Multiple N + impurity diffusion regions formed by diffusion,As mentioned above, the N + impurity diffusion region and P + impurity diffusion region do not overlap at least,In the absence of engineering changes or additions, the collector area of output transistors can be expanded to reduce the re combination of basic fields, thus increasing the current income and achieving stable logical effect.

著录项

  • 公开/公告号KR960015649U

    专利类型实用新型

  • 公开/公告日1996.05.17

    原文格式PDF

  • 申请/专利权人 금성일렉트론주식회사;

    申请/专利号KR19940026229

  • 发明设计人 최정희;

    申请日1994.10.07

  • 分类号H01L27/08;

  • 国家 KR

  • 入库时间 2022-08-21 10:59:32

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