It includes: a line selector (3) and / or a column controller (5), which comprises an output channel sequence (551...) corresponding to different rows in the matrix. The selection circuit also includes a series of shift registers (. 511k) and a series of switches (.),53k) is controlled by at least one configuration word (CSW) to control the corresponding configuration (531...... 53k) and switch (531...) of the selection circuit. According to the corresponding bit state of the configuration word (B0..... Bk-1), in the switch sequence in one of the first configuration or the second configuration, the first configuration is used to transmit signals in the register sequence.The second structure is used to copy the signal on the previous output path on a given output path, so as to copy the data in the row corresponding to the given output path corresponding to the previous output path.
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