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Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error

机译:结合矩形和汉明产品代码的双层错误控制代码用于缓存错误

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摘要

We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems, while maintaining low power, area and latency overhead. Based on the fact of low latency and overhead of rectangular codes and high error control capability of Hamming product codes, two-layer error control codes employ simple rectangular codes for each cache line to detect cache errors, while loading the extra Hamming product code checks bits in the case of error detection; thus enabling reliable large-scale cache operations. Analysis and experiments are conducted to evaluate the cache fault-tolerant capability of various existing solutions and the proposed approach. The results show that the proposed approach can significantly increase Mean-Error-To-Failure (METF) and Mean-Time-To-failure (MTTF) up to 2.8×, reduce storage overhead by over 57%, and increase instruction per-cycle (IPC) up to 7%, compared to complex four-way 4EC5ED; and it increases METF and MTTF up to 133×, reduces storage overhead by over 11%, and achieves a similar IPC compared to simple eight-way single-error correcting double-error detecting (SECDED). The cost of the proposed approach is no more than 4% external memory access overhead.
机译:我们提出一种新颖的两层错误控制码,将矩形码的错误检测能力和汉明产品码的错误纠正能力有效地结合起来,以提高许多核心系统的缓存错误恢复能力,同时保持低功耗,面积和延迟开销。基于矩形代码的低等待时间和开销以及汉明产品代码的高错误控制能力的事实,两层错误控制代码对每个高速缓存行采用简单的矩形代码来检测高速缓存错误,同时加载额外的汉明产品代码检查位在错误检测的情况下;从而实现可靠的大规模高速缓存操作。进行分析和实验,以评估各种现有解决方案和所提出方法的缓存容错能力。结果表明,所提出的方法可以显着提高平均错误率(METF)和平均错误时间(MTTF)到2.8倍,将存储开销减少超过57%,并增加每个周期的指令(IPC)高达7%,而复杂的四路4EC5ED则更高;与简单的八路单错误纠正双错误检测(SECDED)相比,它可以将METF和MTTF增加到133倍,将存储开销减少了11%以上,并实现了类似的IPC。提出的方法的成本不超过外部存储器访问开销的4%。

著录项

  • 作者

    Zhang Meilin; Ampadu Paul;

  • 作者单位
  • 年度 2014
  • 总页数
  • 原文格式 PDF
  • 正文语种 en_US
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