Organic thin-film transistors (OTFTs) are promising for flexible large-area electronics. However, the bias-stress effect (BSE) in OTFTs causes operational instability that limits the usefulness of the OTFT technology in a wide range of circuit applications. Currently, most existing studies on OTFT BSE are inadequate because of one or more of the following reasons. First, they study the BSE on OTFTs with thermally grown Si0 2, which cannot be used in flexible electronics due to its high deposition temperature. Secondly, they use devices with no encapsulation, and the devices degrade by exposure to H₂0 and 0₂ in ambient air. The existence of such other degradation mechanisms complicates the interpretation of the BSE measurements on these devices. Lastly, they do not study the BSE systematically to fully identify its dependencies on various stress conditions. This work addresses these issues by systematically studying the electrical characteristics of the BSE in integrated pentacene OTFTs with polymer gate dielectric and encapsulation. Pentacene is used as the model organic semiconductor because it is the most widely used organic semiconductor for OTFTs. The measurements reveal that the BSE results from carriers that are trapped at the semiconductor/dielectric interface. The BSE can be accurately modeled by a shift in the gate voltage, [delta]V, which equals qN/Ci, where N is the density of trapped carriers, and Ci is the channel capacitance per unit area. The BSE occurs only when both gate field and channel carriers are present and the drain current does not increase the BSE. Because the density of traps is limited, when there are more carriers induced in the channel than available number of traps, AV saturates at a constant value, which is directly proportional to the trap density in the channel.
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