The introduction of complex SoCs with multiple processor cores presents newdevelopment challenges, such that development support is now a decisive factorwhen choosing a System-on-Chip (SoC). The presented developments supportstrategy addresses the challenges using both architecture and technologyapproaches. The Multi-Core Debug Support (MCDS) architecture provides flexibletriggering using cross triggers and a multiple core break and suspend switch.Temporal trace ordering is guaranteed down to cycle level by on-chip timestamping. The Package Sized-ICE (PSI) approach is a novel method of includingtrace buffers, overlay memories, processing resources and communicationinterfaces without changing device behavior. PSI requires no external emulationbox, as the debug host interfaces directly with the SoC using a standardinterface.
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