Projeto de um amplificador operacional CMOS de baixa tensão do tipo rail-to-rail

摘要

This dissertation describes the process of designing operational amplifiers in CMOS technology. To accomplish this, the author focused on two amplifiers with distinct specifications. The first one was the canonical amplifier with internal Miller compensation, whose specifications included the nominal power supply of 3V, minimum open-loop low-frequency gain of 60dB and unity-gain frequency of 4MHz driving an external load of 10kΩ in parallel with 10pF. The second one, exploiting the experience obtained from the previous amplifier, was an operational amplifier with rail-to-rail input and output with more rigorous specifications: 3V power supply, minimum open-loop low-frequency gain of 80dB and 10MHz unity-gain frequency driving an external load of 10kΩ in parallel with 10pF. Prototypes of the canonical amplifier were fabricated in 0.8µm CMOS technology while the rail-to-rail amplifier was implemented in 0.6µm CMOS technology. Experimental results were in very good agreement with the specifications. For example, input and output signal swings from the second amplifier proved to be fully compatible with typical rail-to-rail op-amps while the remaining characteristics confirmed that the design process was very adequate.