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Polysilicon heaterstructures for use in highly accelerated reliability testing at wafer level

机译：多晶硅加热器结构，用于晶圆级的高加速可靠性测试

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Weinberger David;
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年度 2011
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1. A reliability statistics perspective on the pitfalls of standard wafer-level electromigration accelerated test (SWEAT) [J] . Cher Ming Tan, Kelvin Ngan Chong Yeo Journal of Electronic Testing: Theory and Applications: Theory and Applications . 2001,第1期

机译：标准晶圆级电迁移加速试验（汗水）陷阱的可靠性统计视角
2. Extended Metallization Reliability Testing: Combining Standard Wafer Level With Product Tests To Increase Test Sensitivity [J] . V. Born, M. Beck, O. Bosholm, Microelectronics reliability . 2009,第1期

机译：扩展的金属化可靠性测试：将标准晶圆水平与产品测试相结合，以提高测试灵敏度
3. A Versatile, Via Terminated Electromigration Test Structure for Various Stress Modes Used During Fast Wafer Level Reliability (fWLR) Testing [J] . Andreas Pietsch, Andreas Martin, Josef Fazekas IEEE Transactions on Semiconductor Manufacturing . 2006,第1期

机译：在快速晶圆级可靠性（fWLR）测试中使用的各种应力模式的通用通孔端接电迁移测试结构
4. A correlation between highly accelerated Wafer Level and standard Package Level electromigration tests on deep sub-micron via-line structures [C] . Lepper, M., Bauer, Integrated Reliability Workshop Final Report, 2000 IEEE International . 2000

机译：深亚微米通孔结构上高度加速的晶圆级和标准封装级电迁移测试之间的相关性
5. Effect of structural design parameters on wafer level CSP ball shear strength and their influence on accelerated thermal cycling reliability. [D] . Lakhkar, Nikhil R. 2010

机译：结构设计参数对晶圆级CSP球剪切强度的影响及其对加速热循环可靠性的影响。
6. Effect of Wafer Level Underfill on the Microbump Reliability of Ultrathin-Chip Stacking Type 3D-IC Assembly during Thermal Cycling Tests [O] . Chang-Chun Lee 2017

机译：晶圆级底部填充对热循环测试过程中超薄芯片堆叠式3D-IC组件微凸点可靠性的影响
7. Development of Resin Strress Buffer Layer Type Wafer Level Chip Size Package with High Reliability for Board Level Test [O] . Nobuaki HASHIMOTO, Shuichi TANAKA, Shunpei OGAYA, 2008

机译：开发树脂应力缓冲层型晶片型芯片尺寸封装，具有高可靠性的板级测试

Polysilicon heaterstructures for use in highly accelerated reliability testing at wafer level

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