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Enhanced Schottky barrier on InGaAs for high performance photodetector applications

机译:InGaAs上增强的肖特基势垒,用于高性能光电探测器应用

摘要

[[abstract]]A low temperature (LT=77 K) processing technique was used for Schottky metal deposition on InGaAs. The Schottky barrier height of Ag/InGaAs contact processed at low temperature was found to be 0.64 eV. This value is more than two times higher than that of the barrier height of 0.30 eV obtained from the sample processed at room temperature (RT). The enhanced Schottky contacts are superior for the application on high performance semiconductor photodetectors. The current–voltage–temperature (I–V–T) measurements were conducted to study the current transport mechanism. Atomic force microscope was used to study the surface morphology correlating with the electrical properties. The LT metal showed cracked structure, which combined by islands, while the RT metal surface appeared to be more uniform with some sharp dots.
机译:[摘要]低温(LT = 77 K)处理技术用于InGaAs上的肖特基金属沉积。发现在低温下处理的Ag / InGaAs接触的肖特基势垒高度为0.64eV。该值比从室温(RT)处理的样品获得的势垒高度0.30 eV高两倍以上。增强的肖特基触点在高性能半导体光电探测器上的应用非常出色。进行了电流-电压-温度(IV-T)测量以研究电流传输机制。使用原子力显微镜研究与电学性质相关的表面形态。 LT金属显示出裂纹结构,由岛合并,而RT金属表面则显得更均匀,并带有一些尖锐的点。

著录项

  • 作者

    L. He;

  • 作者单位
  • 年度 2012
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  • 原文格式 PDF
  • 正文语种 [[iso]]en
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