Design of a 1-chip IBM-3270 protocol handler

摘要

The single-chip design of a 20MHz IBM-3270 coax protocol handler in a conventional 3 μ CMOS process-technology is discussed. The harmonious combination of CMOS circuit tricks and high-level design disciplines allows the 50k transistor design to be compiled and optimized into a 35 mm**2 chip in 4 manweeks. The design methodology stresses the application of high-level silicon constructs and built-in testability.