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Simultaneous Communication and Processor Voltage Scaling for Dynamic and Leakage Energy Reduction in Time-Constrained Systems

机译:同时通信和处理器电压调节在时间约束系统中动态和泄漏能量减少

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摘要

In this paper, we propose a new technique for the combined voltagescaling of processors and communication links, taking into account dynamic as well as leakage power consumption. The voltage scaling technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic voltage swing scaling. We also introduce a set of accurate communication models for the energy estimation of voltage scalable embedded systems. In particular, we demonstrate that voltage scaling of bus repeaters and dynamic adaption of the voltage swing on fat wires can significantly influence the system s energy consumption. Experimental results, conducted on numerous generated benchmarks and a real-life example, demonstrate that substantial energy savings can be achieved with the proposed techniques.
机译:在本文中,我们考虑到动态以及泄漏功耗,提出了一种用于处理器和通信链路的组合电压缩放的新技术。在具有中继器的处理器和总线的情况下,电压缩放技术通过同时缩放电源电压和车身偏置电压来实现能源效率,而粗电线上的能量效率则通过动态电压摆幅缩放实现。我们还介绍了一组准确的通信模型,用于电压可扩展嵌入式系统的能量估计。特别是,我们证明了总线中继器的电压缩放和粗电线上电压摆幅的动态适应会显着影响系统的能耗。在许多生成的基准和实际示例中进行的实验结果表明,使用所提出的技术可以节省大量能源。

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