Design of a robust digital current controller for agrid connected interleaved inverter

摘要

This paper is concerned with the design and practicalimplementation of a robust digital current controller for a threephasevoltage source grid-connected interleaved inverter. Eachphase consists of 6 half-bridge channels connected in parallel.Due to the current ripple cancellation of the interleavingtopology, only small output filter capacitors are required whichprovide high impedance to grid voltage harmonics and hencebetter current quality compared to traditional 2-level LCLtopology. The current in each inductor is controlled via a singlefeedback loop. A feedforward loop of the grid voltage isincorporated to compensate for the grid disturbance. To controlthe high resonance frequency of the filter, high sampling andswitching frequencies are required. Alternatively, resistors inseries with the filter capacitors are used to provide damping.This method becomes practically possible due to the lowmagnitude of the current of the capacitors and consequently lowpower dissipation in the damping resistors. The paper alsostudies in detail the effects of computational time delay and gridimpedance variation on system stability. A phase lagcompensator incorporated in the inductor current loop isdesigned to increase system immunity to grid impedancevariations. Simulation and practical results are presented tovalidate the design.