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Comparative Performance Evaluation of Orthogonal-Signal-Generators-Based Single-Phase PLL Algorithms:A Survey

机译:基于正交信号发生器的单相锁相环算法比较性能评估:一项综述

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摘要

The orthogonal signal generator based phase-locked loops (OSG-PLLs) are among the most popular single-phase PLLs within the areas of power electronics and power systems, mainly because they are often easy to be implement and offer a robust performance against the grid disturbances. The main aim of this paper is to present a survey of the comparative performance evaluation among the state-of-the-art OSG-PLLs (include Delay-PLL, Deri-PLL, Park-PLL, SOGI-PLL, DOEC-PLL, VTD-PLL, CCF-PLL, and TPFA-PLL) under different grid disturbances such as voltage sags, phase and frequency jumps, and in the presence of dc offset, harmonic components, and white noise in their input. This analysis provides a useful insight about the advantages and disadvantages of these PLLs. The performance enhancement of Delay-PLL, Deri-PLL, and CCF-PLL by including a moving average (MAF) filter into their structure is another goal of this paper.
机译:基于正交信号发生器的锁相环(OSG-PLL)是电力电子和电力系统领域中最受欢迎的单相PLL之一,主要是因为它们通常易于实现并且在电网方面具有强大的性能干扰。本文的主要目的是对最先进的OSG-PLL(包括Delay-PLL,Deri-PLL,Park-PLL,SOGI-PLL,DOEC-PLL, VTD-PLL,CCF-PLL和TPFA-PLL)在不同的电网干扰下,例如电压骤降,相位和频率跳变,以及输入中存在直流失调,谐波成分和白噪声的情况。该分析提供了有关这些PLL的优缺点的有用见解。本文通过将移动平均(MAF)滤波器纳入其结构来提高Delay-PLL,Deri-PLL和CCF-PLL的性能,这是本文的另一个目标。

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