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Edge-Triggered Logical Elements and Their Applications to Realization of Asynchronous Sequential Circuits

机译：边沿触发逻辑元件及其在异步时序电路实现中的应用

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滑川英世 / 櫛田敏夫; ナメカワヒデヨ / クシダトシオ; NAMEKAWA hideyo / KUSHIDA toshio;
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年度 1984
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原文格式 PDF
正文语种 jpn
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1. Multiplexor Method for Realization of Boolean Functions by Circuits Composed of Arbitrary Logical Elements [J] . A. A. Shalyto Journal of Computer and Systems Sciences International . 2003,第1期

机译：由任意逻辑元件组成的电路实现布尔函数的复用器方法
2. A Full Scan Design Method for Asynchronous Sequential Circuits Based on C-element Scan Paths [J] . Hiroshi IWATA, Satoshi OHTAKE, Michiko INOUE, 電子情報通信学会技術研究報告. ディペンダブルコンピュ-ティング. Dependable Computing . 2010,第106期

机译：基于C元素扫描路径的异步时序电路全扫描设计方法
3. A Full Scan Design Method for Asynchronous Sequential Circuits Based on C-element Scan Paths [J] . Hiroshi IWATA, Satoshi OHTAKE, Michiko INOUE, 電子情報通信学会技術研究報告 . 2010,第106期

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4. Computational design of organic photochromic molecules for applications as logical switches and memory elements in all-optical and optoelectronic circuits (Article submitted for presentation only) [C] . Arteem E. Masunov, Ivan A. Mikhailov, Kevin D. Belfield World multi-conference on systemics, cybernetics and informatics;WMSCI 2008;ISAS;International conference on Information systems analysis and synthesis . 2008

机译：有机光致变色分子的计算设计，用作全光和光电电路中的逻辑开关和存储元件（仅提交用于展示的文章）
5. Realization and Formal Analysis of Asynchronous Pulse Communication Circuits [D] . Miller, Merritt Philip. 2015

机译：异步脉冲通信电路的实现与形式分析
6. Estimating Attractor Reachability in Asynchronous Logical Models [O] . Nuno D. Mendes, Rui Henriques, Elisabeth Remy, -1

机译：估计异步逻辑模型中的吸引子可达性
7. Edge-Triggered Pulsed Sequential Elements with SoC Applications [O] . Ch. Lavanya, N. Gopichand, L. Srinivas 2016

机译：具有SOC应用的边缘触发的脉冲顺序元素
8. Delay Free Realization of Asynchronous Sequential Switching Circuits Using Constrained Gate Delay Ratios. [R] . palmquist,steven robert 1973

机译：基于约束门延迟比的延迟自由实现异步时序开关电路。

Edge-Triggered Logical Elements and Their Applications to Realization of Asynchronous Sequential Circuits

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