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Common-mode noise reduction schemes for weakly coupled differential serpentine delay microstrip lines

机译:弱耦合差分蛇形延迟微带线的共模降噪方案

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摘要

This paper proposes design schemes to reduce the common mode noise from weakly coupled differential serpentine delay microstrip lines (DSDMLs). The proposed approach is twofold: we leverage strongly coupled vertical-turn-coupled traces (VTCTs) instead of weakly coupled VTCTs (conventional pattern) and add guard traces. Time- and frequency-domain analyses of the proposed schemes for reducing the common-mode noise are performed by studying the transmission waveform and the differential-to-common mode conversion using the circuit solver HSPICE and the 3-D full-wave simulator HFSS, respectively. Compared to the conventional design of the weakly coupled DSDMLs, the proposed solutions yield a reduction of about 54% of the peak-to-peak amplitude of the common-mode noise, while the differential impedance remains matched along the complete length of the DSDML. Moreover, the range of frequencies, over which the magnitude of the differential-to-common mode conversion is now significantly reduced, is very wide, i.e. about 0.3-10 GHz. Furthermore, the differential insertion and reflection loss introduced by the newly proposed designs are almost the same as the ones achieved by using the conventional design. Finally, a favorable comparison between simulated and measured results confirms the excellent common-mode noise reduction performance of the proposed schemes.
机译:本文提出了一些设计方案,以减少弱耦合差分蛇形延迟微带线(DSDML)产生的共模噪声。提议的方法有两个方面:我们利用强耦合垂直转弯耦合迹线(VTCT)代替弱耦合VTCT(常规模式)并添加保护迹线。通过使用电路求解器HSPICE和3-D全波模拟器HFSS研究传输波形和差模至共模转换,对提出的降低共模噪声的方案进行了时域和频域分析,分别。与传统的弱耦合DSDML设计相比,所提出的解决方案可将共模噪声的峰峰值幅度降低约54%,而差分阻抗则沿DSDML的整个长度保持匹配。而且,差模-共模转换的幅度现在已大大减小的频率范围非常宽,即约0.3-10GHz。此外,新提出的设计引入的差分插入和反射损耗几乎与使用常规设计实现的差异相同。最后,在模拟结果和测量结果之间进行了有利的比较,证实了所提出方案的出色的共模降噪性能。

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