首页> 外文OA文献 >SystemC-based electronic system level design methodology for SoC design-space exploration
【2h】

SystemC-based electronic system level design methodology for SoC design-space exploration

机译:用于SoC设计的基于SystemC的电子系统级设计方法-空间探索

摘要

The trend today is to apply embedded systems based on Systemon- Chip (SoC) in the design of electronic systems. Such SoC solutions typically consist of embedded processor(s), embedded memories, hardware accelerators (or IP cores), high-speed communication interfaces and reconfigurable logic. Consequently, the development of these electronic systems has become increasingly complex, as they impose more severe demands (such as lower cost, higher performance, product quality, security, and time-to-market). In addition, as Moore?s Law drives further the capabilities of digital hardware, there is a demand for greater number of functionalities to be conceived in a more constrained design space (Camposano, 1997).
机译:当今的趋势是在电子系统设计中应用基于Systemon-chip(SoC)的嵌入式系统。此类SoC解决方案通常由嵌入式处理器,嵌入式存储器,硬件加​​速器(或IP内核),高速通信接口和可重新配置逻辑组成。因此,由于这些电子系统提出了更严格的要求(例如更低的成本,更高的性能,产品质量,安全性和上市时间),因此其开发变得越来越复杂。此外,由于摩尔定律进一步推动了数字硬件的功能,因此需要在更受限的设计空间中构想出更多的功能(Camposano,1997)。

著录项

  • 作者单位
  • 年度 2008
  • 总页数
  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
  • 中图分类

相似文献

  • 外文文献
  • 中文文献
  • 专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号