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Low-cost software-based self-testing of RISC processor cores

机译：基于软件的低成本RIsC处理器内核自检

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N. Kranitis; G. Xenoulis; D. Gizopoulos; A. Paschalis; Y. Zorian;
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年度 2003
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1. Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores [J] . Lu T.-H.Chen C.-H.Lee K.-J. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2011,第3期

机译：有效的混合测试程序开发，用于基于软件的管道处理器核心自测试
2. Software-Based Self-Testing With Multiple-Level Abstractions for Soft Processor Cores [J] . Chung-Ho Chen, Chih-Kai Wei, Tai-Hua Lu, IEEE transactions on very large scale integration (VLSI) systems . 2007,第5期

机译：基于软件的多级抽象的软处理器内核自测试
3. Low-cost, on-line self-testing of processor cores based on embedded software routines [J] . Dimitris Gizopoulos Microelectronics journal . 2004,第5期

机译：基于嵌入式软件例程的处理器内核的低成本，在线自我测试
4. Low-Cost Software-Based Self-Testing of RISC Processor Cores [C] . N. Kranitis, G. Xenoulis, D. Gizopoulos, Workshop on New security paradigms workshop . 2009

机译：基于低成本软件的RISC处理器内核自测
5. Low-cost congestion control techniques for Networks-on-Chip based multi-core processors. [D] . Debnath, Monobrata. 2016

机译：基于片上网络的多核处理器的低成本拥塞控制技术。
6. Performance Assessment of a Software-Based Coincidence Processor for the EXPLORER Total-Body PET Scanner [O] . Edwin K. Leung, Martin S. Judenhofer, Simon R. Cherry, -1

机译：EXPLORER全身PET扫描仪基于软件的重合处理器的性能评估
7. Software-based self-testing for a risc processor [O] . Teh Wee Meng 2014

机译：基于软件的风险处理器自检

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