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Parametric Timing and Power Macromodels for High Level Simulation of Low-Swing Interconnects

机译：参数化时序和功率宏模型用于低摆幅互连的高级仿真

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Davide Bertozzi; Luca Benini; Bruno Ricco;
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年度 2014
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1. Parametric Macromodels for Efficient Design of Carbon Nanotube Interconnects [J] . Ferranti F., Antonini G., Dhaene T., Electromagnetic Compatibility, IEEE Transactions on . 2014,第6期

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2. High-speed low-power on-chip global interconnects using low-swing self-timed regenerators [J] . Rezaei Hossein, Moghaddam Soodeh Aghli, Rahmati Abdolreza Microelectronics journal . 2016,第deca期

机译：使用低摆幅自定时再生器的高速低功耗片上全局互连
3. Transient Simulation of Lossy Interconnects Based on a Dispersive Hybrid Phase-Pole Macromodel [J] . Zhong B., Dvorak S. L., Prince J. L. IEEE Transactions on Advanced Packaging . 2007,第2期

机译：基于色散混合相极宏模型的有损互连瞬态仿真
4. Parametric timing and power macromodels for high level simulation of low-swing interconnects [C] . Davide Bertozzi, Luca Benini, Bruno Ricco, International symposium on Low power electronics and design . 2002

机译：用于低摆幅互连的高级仿真的参数定时和功率宏模型
5. Low-Swing Signaling for FPGA Interconnect Power Reduction. [D] . Sharifymoghaddam, Sayeh. 2015

机译：用于FPGA互连功耗降低的低摆信号。
6. Walking with a powered ankle-foot orthosis: the effects of actuation timing and stiffness level on healthy users [O] . Marta Moltedo, Tomislav Baček, Ben Serrien, 2020

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7. Parametric timing and power macromodels for high level simulation of low-swing interconnects [O] . BERTOZZI D., BENINI L, RICCO B 2002

机译：参数化时序和功率宏模型，用于低摆幅互连的高级仿真

Parametric Timing and Power Macromodels for High Level Simulation of Low-Swing Interconnects

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