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A Low-Power Design Methodology for High-Resolution Pipelined Analog-to-Digital Converters

机译：用于高分辨率流水线模数转换器的低功耗设计方法

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Reza Lotfi; Mohammad Taherzadeh-sani; M. Yaser Azizi; Omid Shoaei;
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年度 2015
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1. Design of a low-power CMOS operational amplifier with common-mode feedback for pipeline analog-to-digital converter applications [J] . SOHIFUL ANUAR ZAINOL MURAD, IZATUL SYAFINA ISHAK, MOHD FAIRUS AHMAD, Turkish Journal of Electrical Engineering and Computer Sciences . 2017,第3期

机译：具有流水线模数转换器应用的具有共模反馈的低功耗CMOS运算放大器的设计
2. A partially switched-opamp technique for high-speed low-power pipelined analog-to-digital converters [J] . Hwi-Cheol Kim, Deog-Kyoon Jeong, Kim W. IEEE transactions on circuits and systems . I , Regular papers . 2006,第4期

机译：高速低功耗流水线模数转换器的部分开关运算技术
3. A Partially Switched-Opamp Technique for High-Speed Low-Power Pipelined Analog-to-Digital Converters [J] . Hwi-Cheol Kim, Deog-Kyoon Jeong, Wonchan Kim IEEE Transactions on Circuits and Systems. I, Regular Papers . 2006,第4期

机译：高速低功耗流水线模数转换器的部分开关运算技术
4. A low-power design methodology for high-resolution pipelined analog-to-digital converters [C] . Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, International symposium on Low power electronics and design . 2003

机译：适用于高分辨率流水线模数转换器的低功耗设计方法
5. Low power high speed and high accuracy design methodologies for pipeline Analog-to-Digital Converters. [D] . Katyal, Vipul. 2008

机译：适用于流水线模数转换器的低功耗，高速，高精度设计方法。
6. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor [O] . Mostafa Chakir, Hicham Akhamal, Hassan Qjidaa 2017

机译：用于单片有源像素传感器的新型列并行模数转换器闪存的设计
7. Low power high speed and high accuracy design methodologies for pipeline Analog-to-Digital converters [O] . Katyal, Vipul 2008

机译：用于管道模数转换器的低功耗高速，高精度设计方法

A Low-Power Design Methodology for High-Resolution Pipelined Analog-to-Digital Converters

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