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Improvement of Performance of Paper Transistor Using Carbon-Nanotube-Composite Paper and Its Application to Logic Circuit

机译：碳纳米管复合纸改善纸质晶体管性能及其在逻辑电路中的应用

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Yoshiki Hamana; Takahide Oya;
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年度 2015
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1. Application of Carbon-Nanotube-Composite Japanese Washi Paper to Authentication Systems [J] . Keisuke Watanabe, Takahide Oya Japanese journal of applied physics . 2009,第6issue2期

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2. Flexible protonic/electronic coupled neuron transistors self-assembled on paper substrates for logic applications [J] . Wei Dou, Li Qiang Zhu, Jie Jiang, Applied Physics Letters . 2013,第9期

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3. Invited Paper: Amorphous Oxide Semiconductor Thin-Film Transistors: Performance & Manufacturability for Display Applications [J] . John F. Wager SID International Symposium: Digest of Technology Papers . 2009,第1期

机译：受邀论文：非晶氧化物半导体薄膜晶体管：显示应用的性能和可制造性
4. Improvement of Performance of Paper Transistor Using Carbon-Nanotube-Composite Paper and Its Application to Logic Circuit [C] . Yoshiki Hamana, Takahide Oya Forum on New Materials;International Ceramics Congress . 2014

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5. Performance dependence on the nonlinearity and architecture of the room temperature ballistic deflection transistor for logic applications. [D] . Kaushal, Vikas K. 2011

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6. Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits [O] . R. A. Sporea, M. J. Trainor, N. D. Young, -1

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7. Dual‐Gate Field Effect Transistors: Planar Dual‐Gate Paper/Oxide Field Effect Transistors as Universal Logic Gates (Adv. Electron. Mater. 12/2018) [O] . Diana Gaspar, Jorge Martins, Pydi Bahubalindruni, 2018

机译：双栅极场效应晶体管：平面双栅纸/氧化物场效应晶体管作为通用逻辑门（ADV。电子。Matter。12/2018）
8. Static and Dynamic Performance of Micropower Transistor Logic Circuits. Part II. Micropower Logic Circuit Design [R] . Wagner, L. F., Meindl, J. D. 1967

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Improvement of Performance of Paper Transistor Using Carbon-Nanotube-Composite Paper and Its Application to Logic Circuit

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