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Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding

机译：使用指令压缩和可重新配置编码的嵌入式Dsp系统的面积和功耗降低

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Subash Ch; Ar G; Mahesh Mehendale; R. Govindarajan;
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年度 2015
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1. Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding [J] . SUBASH CHANDAR GOVINDARAJAN, MAHESH MEHENDALE, R. GOVINDARAJAN Journal of VLSI signal processing systems . 2006,第3期

机译：使用指令压缩和可重新配置编码的嵌入式DSP系统的面积和功耗降低
2. Shifted gray encoding to reduce instruction memory address bus switching for low-power embedded systems [J] . Guo H, Parameswaran S Journal of systems architecture . 2010,第4a6期

机译：灰色移位编码可减少低功耗嵌入式系统的指令存储器地址总线切换
3. Low-power instruction bus encoding for embedded processors [J] . Petrov P., Orailoglu A. IEEE transactions on very large scale integration (VLSI) systems . 2004,第8期

机译：嵌入式处理器的低功耗指令总线编码
4. Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding [C] . Chandar, S.G., Mehendale, . 2001

机译：使用指令压缩和可重新配置编码的嵌入式DSP系统的面积和功耗降低
5. Embedded system design and power-rate-distortion optimization for video encoding under energy constraints [D] . Cheng, Wenye 2007

机译：能量约束下视频编码的嵌入式系统设计和功率失真优化
6. Reduction of Radiation Dose and Scanning Time While Preserving Diagnostic Yield: A Comparison of Battery-Powered and Manual Bone Biopsy Systems [O] . S. Kihira, C. Koo, A. Lee, 2020

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7. Re-configurable bus encoding scheme for reducing power consumption of cross coupling capacitance for deep sub-micron instruction bus [O] . Siu-kei Wong, Chi-ying Tsui 2004

机译：可重新配置的总线编码方案，用于降低深亚微米指令总线的交叉耦合电容的功耗
8. Adaptive On-Line Help for Embedded Instructional Systems [R] . Shaw, D. S., Golish, L. M., Webster, J. L., 1991

机译：嵌入式教学系统的自适应在线帮助

Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding

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