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1Improving Conditional Branch Prediction on Speculative Multithreading Architectures

机译：1改进推测多线程体系结构的条件分支预测

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作者
Chitaka Iwama; Niko Demus Barli; Shuichi Sakai; Hidehiko Tanaka;
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年度 2015
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入库时间 2022-08-20 20:59:06

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专利

1. Compiler Support for Speculative Multithreading Architecture with Probabilistic Points-to Analysis [J] . Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, ACM SIGPLAN Notices: A Monthly Publication of the Special Interest Group on Programming Languages . 2003,第10期

机译：带有概率指向分析的推测性多线程体系结构的编译器支持
2. A chip-multiprocessor architecture with speculative multithreading [J] . Krishnan V., Torrellas J. IEEE Transactions on Computers . 1999,第9期

机译：具有推测性多线程的芯片多处理器架构
3. Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware [J] . Hyesoon Kim, Joao J.A., Mutlu O., Computers, IEEE Transactions on . 2009,第9期

机译：虚拟程序计数器（VPC）预测：使用条件分支预测硬件的极低成本间接分支预测
4. Improving Conditional Branch Prediction on Speculative Multithreading Architectures [C] . Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, European Conference on Parallel Computing . 2001

机译：改进载型多线程架构的条件分支预测
5. Broadcast mechanism for improving conditional branch prediction in speculative multithreaded processors. [D] . Thankappan Achary Retnamma, Renjith. 2010

机译：广播机制，用于改善推测性多线程处理器中的条件分支预测。
6. Multithreaded comparative RNA secondary structure prediction using stochastic context-free grammars [O] . Zsuzsanna Sükösd, Bjarne Knudsen, Morten Værum, 2011

机译：使用随机上下文无关文法的多线程比较RNA二级结构预测
7. Broadcast Mechanism for improving Conditional Branch Prediction in Speculative Multithreaded Processors [O] . Thankappan Achary Retnamma Renjith 2010

机译：改进推测多线程处理器中条件分支预测的广播机制
8. Molecular Genetic Analysis of Maize Starch Branching Isoforms: Modulation of Starch Branching Enzyme Isoform Activities in Maize to Produce Starch with Novel Branching Architecture and Properties [R] . Guiltinan, M. J., Thompson, D. 2008

机译：玉米淀粉分支异构体的分子遗传分析：玉米淀粉分支酶同工酶活性调控产生淀粉的新分支结构和性质

1Improving Conditional Branch Prediction on Speculative Multithreading Architectures

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