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Source/Drain Dislocations and Electrical Leakage in Titanium-Salicided CMOS Integrated Circuits

机译：钛硅化CmOs集成电路中的源极/漏极位错和漏电

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R. L. Guldi;
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年度 2016
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1. Impact of gate induced drain leakage on overall leakage ofsubmicrometer CMOS VLSI circuits [J] . Semenov O., Pradzynski A., Sachdev M. IEEE Transactions on Semiconductor Manufacturing . 2002,第1期

机译：栅极感应漏极泄漏对亚微米CMOS VLSI电路整体泄漏的影响
2. Junction Depth Dependence of the Gate Induced Drain Leakage in Shallow Junction Source/Drain-Extension Nano-CMOS [J] . Seung-Hyun SONG, Jae-Chul KIM, Sung-Woo JUNG, IEICE Transactions on Electronics . 2008,第5期

机译：浅结源极/漏极扩展纳米CMOS中栅极感应的漏极泄漏的结深度依赖关系
3. LCNT-an approach to minimize leakage power in CMOS integrated circuits [J] . Lorenzo Rohit, Chaudhury Saurabh Microsystem technologies . 2017,第9期

机译：LCNT - 一种最大限度地减少CMOS集成电路漏电的方法
4. Circuit to reduce Gate Induced Drain Leakage in CMOS output buffers [C] . Ravi Hari Anand, Goel Mayank, Bhilawadi Prasad 2014 22nd International Conference on Very Large Scale Integration . 2014

机译：减少CMOS输出缓冲器中栅极感应的漏极泄漏的电路
5. Low resistivity contact methodologies for silicon, silicon germanium and silicon carbon source/drain junctions of nanoscale CMOS integrated circuits. [D] . Alptekin, Emre. 2009

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7. Low power current sources for bioimpedance measurements: A comparison between Howland and integrated CMOS OTA circuits [O] . Pedro Bertemes-Filho, Volney Coelho Vincence, Marcio S Santos, 2012

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8. New Breakthrough in Chinese Integrated Circuits - Successful Development of High-Speed CMOS (Complementary Metal Oxide Semiconductor) Circuits [R] . Wang, S. 1987

机译：中国集成电路的新突破 - 高速CmOs（互补金属氧化物半导体）电路的成功开发

Source/Drain Dislocations and Electrical Leakage in Titanium-Salicided CMOS Integrated Circuits

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