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Trust-by-Wire in Packet-Switched IPv6 Networks: Tools and FPGA Prototype for the IPclip System

机译：分组交换Ipv6网络中的线控信任：Ipclip系统的工具和FpGa原型

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Peter Danielis; Stephan Kubisch; Harald Widiger; Jens Rohrbeck; Vladyslav Altman; Jan Skodzik; Dirk Timmermann; Thomas Bahls; Daniel Duchow;
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年度 2016
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1. A Simulink-based hybrid codesign tool for rapid prototyping of FPGA's in signal processing systems [J] . L.M. Reyneri Microprocessors and microsystems . 2004,第5a6期

机译：基于Simulink的混合代码签名工具，用于信号处理系统中FPGA的快速原型制作
2. Formullar: An FPGA-based network testing tool for flexible and precise measurement of ultra-low latency networking systems [J] . Park Taejune, Shin Seungwon, Shin Insik, Computer networks . 2021,第Feba11期

机译：Formullar：基于FPGA的网络测试工具，用于柔性和精确测量超低延迟网络系统
3. A generic FPGA prototype for on-chip systems with network-on-chip communication infrastructure [J] . Mohammad Arjomand, Amirali Boroumand, Hamid Sarbazi-Azad Computers and Electrical Engineering . 2014,第1期

机译：具有片上网络通信基础架构的片上系统的通用FPGA原型
4. Trust-by-Wire in Packet-Switched IPv6 Networks: Tools and FPGA Prototype for the IPclip System [C] . Danielis Peter, Kubisch Stephan, Widiger Harald, Consumer Communications and Networking Conference, 2009. CCNC 2009 . 2009

机译：分组交换IPv6网络中的有线信任：IPclip系统的工具和FPGA原型
5. FPGA Development of an Emulator of the RD53A Prototype Chip and Its Integration with Various Readout Systems [D] . Smith, Douglas George. 2019

机译：FPGA开发RD53A原型芯片的仿真器及其与各种读数系统的集成
6. Fault Injection Emulation for Systems in FPGAs: Tools Techniques and Methodology a Tutorial [O] . Óscar Ruano, Francisco García-Herrero, Luis Alberto Aranda, 2021

机译：FPGA中系统故障注射仿真：工具技术和方法教程
7. IPclip: An Architecture to restore Trust-by-Wire in Packet-switched Networks [O] . Harald Widiger, Stephan Kubisch, Peter Danielis, 2015

机译：Ipclip：在分组交换网络中恢复线控信任的架构

Trust-by-Wire in Packet-Switched IPv6 Networks: Tools and FPGA Prototype for the IPclip System

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