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A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits

机译：模拟集成电路中浮栅缺陷（FGD）的测试设计方法

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Michael Pronath; Helmut Graeb; Kurt Antreich;
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年度 2002
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1. Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design [J] . Fabian Khateb AEU: Archiv fur Elektronik und Ubertragungstechnik: Electronic and Communication . 2014,第1期

机译：用于低压低功耗模拟电路设计的批量驱动浮栅和批量驱动准浮栅技术
2. Current Testing of CMOS Combinational Circuits withSingle Floating Gate Defects [J] . Victor H.Champac, JoanFigueras VLSI Design . 1997,第3期

机译：具有单浮栅缺陷的CMOS组合电路的电流测试
3. Testing analog and mixed-signal integrated circuits using oscillation-test method [J] . Arabi K., Kaminska B. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1997,第7期

机译：使用振荡测试方法测试模拟和混合信号集成电路
4. A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits [C] . M. Pronath, H. Graeb, K. Antreich International conference on computer systems and technologies and workshop for PhD students in computing 2009 . 2009

机译：模拟集成电路中浮栅缺陷（FGD）的测试设计方法
5. Analysis and design of low-voltage CMOS analog integrated circuits employing body-driven and floating-gate techniques. [D] . Murphy, Marc William. 2006

机译：使用主体驱动和浮栅技术的低压CMOS模拟集成电路的分析和设计。
6. Scalable excitatory synaptic circuit design using floating gate based leaky integrators [O] . Vladimir Kornijcuk, Hyungkwang Lim, Inho Kim, -1

机译：使用基于浮栅的泄漏积分器可扩展的兴奋性突触电路设计
7. Current Testing of CMOS Combinational Circuits with Single Floating Gate Defects [O] . Victor H. Champac, Joan Figueras 1997

机译：单浮栅缺陷的CMOS组合电路电流测试

A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits

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