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A Fast and Low Cost Testing Technique for Core-based System-on-Chip

机译：基于核的片上系统的快速低成本测试技术

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Indradeep Ghosh; Sujitdey Nirajk; Nirajk Jha;
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年度 1998
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1. A fast and low-cost testing technique for core-based system-chips [J] . Ghosh I., Dey S. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2000,第8期

机译：基于内核的系统芯片的快速低成本测试技术
2. Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip [J] . Zhanglei Wang, Chakrabarty K., Seongmoon Wang Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on . 2009,第8期

机译：基于内核的片上系统的集成LFSR重播，测试访问优化和测试计划
3. CORE-BASED SYSTEM-ON-CHIP TESTING: CHALLENGES AND OPPORTUNITIES [J] . Cheng-Wen Wu, Jin-Fu Li, Chih-Tsun Huang Electricity Today . 2001,第4期

机译：基于核心的片上系统测试：挑战与机遇
4. A fast and low cost testing technique for core-based system-on-chip [C] . Ghosh I., Dey S., Jha N.K. Numerical Simulation of Optoelectronic Devices, 2004. NUSOD '04 . 2004

机译：基于内核的片上系统的快速低成本测试技术
5. Techniques suitable for on chip implementation and ADC Built-in Self-test solutions for low cost and accurate ADC testing [D] . Duan, Jingbo 2011

机译：适用于片上实施和ADC内置自检解决方案的技术，可实现低成本和准确的ADC测试
6. Overall Cost Comparison of Gastrointestinal Endoscopic Procedures With Endoscopist- or Anesthesia-Supported Sedation by Activity-Based Costing Techniques [O] . Richard A. Helmers, James A. Dilling, Christopher R. Chaffee, 2017

机译：内镜医师或麻醉师支持的镇静剂在胃肠内镜手术中的总体成本比较
7. A Fast and Low Cost Testing Technique for Core-based System-on-a-Chip [O] . Indradeep Ghosh, Sujit Dey, Niraj K. Jha 1998

机译：基于核心的片上系统的快速低成本测试技术

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